NXP Semiconductors /LPC800 /WKT /CTRL

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Interpret as CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DIVIDED_IRC_CLOCK_T)CLKSEL 0 (NO_TIME_OUT_THE_SEL)ALARMFLAG 0 (NO_EFFECT_READING_T)CLEARCTR 0RESERVED

CLKSEL=DIVIDED_IRC_CLOCK_T, ALARMFLAG=NO_TIME_OUT_THE_SEL, CLEARCTR=NO_EFFECT_READING_T

Description

Self wake-up timer control register.

Fields

CLKSEL

Select the self wake-up timer clock source.

0 (DIVIDED_IRC_CLOCK_T): Divided IRC clock. This clock runs at 750 kHz and provides time-out periods of up to approximately 95 minutes in 1.33 us increments. This clock is not available in most low-power modes and must not be selected if the timer is to be used to wake up from one of these modes.

1 (LOW_POWER_CLOCK_THI): Low power clock. This is the (nominally) 10 kHz clock and provides time-out periods of up to approximately 119 hours in 100 CTS can be from the input pin, or fs increments. The accuracy of this clock is limited to +/- 45 % over temperature and processing. This clock is available in all power modes. Prior to use, the low-power oscillator must be enabled. The oscillator must also be set to remain active in Deep power-down if needed.

ALARMFLAG

Wake-up or alarm timer flag.

0 (NO_TIME_OUT_THE_SEL): No time-out. The self wake-up timer has not timed out. Writing a 0 to has no effect.

1 (TIME_OUT_THE_SELF_W): Time-out. The self wake-up timer has timed out. This flag generates an interrupt request which can wake up the part from any low power mode not deep power-down. Writing a 1 clears this status bit and the interrupt too?

CLEARCTR

Clears the self wake-up timer.

0 (NO_EFFECT_READING_T): No effect. Reading this bit always returns 0.

1 (CLEAR_THE_COUNTER_C): Clear the counter. Counting is halted until a new count value is loaded.

RESERVED

Reserved.

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